Mr Daniel Raj A – Bannari Amman Institute of Technology

Experience Type	Organization	Designation	Date of Joining	To
Engineering	BIT-Sathy	Assistant Professor Level II	01.01.2019	Till Date
Engineering	BIT-Sathy	Assistant Professor	15.05.2013	01.01.2019

Degree	Specialization	Institute	University	Year of Passing
B E	Electronics and Communication Engineering	SRI RAMAKRISHNA COLLEGE CBE	Anna University of Technology, Coimbatore	2011
M E	VLSI Design	BANNARI AMMAN INSTITUE OF TECHNOLOGY	Anna University, Chennai	2013

Janakiraman, V., Mohanbabu, A., Maheswari, S., Daniel Raj, A., Deb, S., VinodhKumar, N. Noise characterisation of GaN current aperture vertical electron transistor metal-insulated semiconductor field effect transistor with Δ-shaped gate for low noise radio frequency amplifiers(2022) International Journal of RF and Microwave Computer-Aided Engineering, 32 (11), art. no. e23401,
S.Elango , P.Sampath , K. Shoukath Ali , Sajan P Philip ,A.Daniel Raj Investigation and Vlsi Implementation of Linear Convolution Architecture for Fpga Based Signal Processing Applications International Journal of Pure and Applied Mathematics 119 4607 – 4624 JUN 2018

A. Daniel Raj, V. M. Seeja, and Sanjoy Deb Simulation and Performance Analysis of Different Adder Circuits Designed with DNA Logic Gates Journal of Nanoengineering and Nanomanufacturing 6 1 – 9 JUL 2016

Seeja V M, Daniel Raj A, Sanjoy Deb Wallace Tree Multiplier Design and Simulation with DNA Logic Gates Journal of VLSI Design and Signal Processing 2 1 1 – 6 NOV 2016

Seeja V M, Daniel Raj A DNA Logic Gates to Design a 4*4 bit Carry Select Adder Circuit South Asian Journal of Engineering and Technology 2 1 – 6 JUN 2016

C.Rajarajachozhan , A. Daniel Raj , Sanjoy Deb Compensating Threshold Voltage Roll-Off in Nanoscale MOSFET with Parameter Adjustment Journal of VLSI Design and Signal Processing 1 2 – MAY 2015

A. Daniyel Raj, C. Rajarajachozhan, Sanjoy Deb Analysis of Voltage Transfer Characteristics of Nano-scale SOI CMOS Inverter with Variable Channel Length and Doping Concentration JOURNAL OF NANO- AND ELECTRONIC PHYSICS 7 1 – 6 MAY 2015

A.Daniel Raj, S.Vijayalakshmi, P.Sathyamoorthy Efficient Design of 4-bit array multiplier using GDI low power cell IJCTEE 2 6 1 – 5 DEC 2012

Daniel Raj A, Sowmiya G, Sanjoy Deb and Elango S, “Design and Analysis of High Performance Carry Skip Adder Using Various Full Adders”, 5 th IEEE International Conference on Advances in Computing and Communication Engineering, , BIT, April 2019

T.Ashok, N.Vijayakumar, Prof G.B. Mohankumar , Dept of EEE , Nandha Engineering College, Erode A. Daniel Raj, Bannari Amman Institute of Technology, Sathyamangalam, Erode, “POWER MEASUREMENT METHODOLOGY FOR EMBEDDED SYSTEM WITH ARM PROCESSOR “, 6 th National Conference on Signals, Systems and Security (NCSSS – 2014), , Bannari Amman Institute of Technology,

A.Daniel raj,V.Kumar, “Design of low error fixed width modified Booth Multiplier”, NCCCD, , Adithya Institute of Technology,

A.Daniel Raj, “Efficient Design of multiplier using GDI low power cell”, IEECONS, , Kumaraguru College of Technology,

G. Soundarya[1], Mr.A. Danielraj [2] N.Banupriya[3], “DESIGN AND COMPARISON OF 128*128 VEDIC MULTIPLIER USING CADENCE”, ICGICT, , JAY SHRIRAM GROUP OF INSTITUTIONS,

S.Dhanasekar,S.Dinesh Kumar,Mr. Daniel Raj.A,, “BIOMEDICAL INFORMATION ACQUISITION SYSTEMUSING LIFI BASED VISIBLE LIGHT COMMMUNICATION”, ODSC (2017), , Bannari Amman Institute of Technology,

A.Daniel Raj, S.Vijayalakshmi , “Design of 4 bit Array multiplier using GDI low power cell”, International Convention Cum Pre Conference Workshop on Innovations in Engineering and Technology for Sustainable Development, , Bannari Amman Institute of Technology,

S.A.Subhasakthe, A.Daniel Raj , “Survey on Network â??on â??Chip router architectures”, NCCCN 2013 , , Bannari Amman Institute of Technology,

S.No.	Achievements
1	Best YRC Co-ordinator 2018