Dr Murugan K - Bannari Amman Institute of Technology

Experience Type	Organization	From	To	Total Experience
Engineering	Bannari Amman Institute of Technology, Sathyamangalam	14.09.2020
Engineering	DR. SIVANTHI ADITANAR COLLEGE OF ENGINEERING	04.07.2016	08.09.2020	4 Year(s) & 2 Month(s)
Engineering	NATIONAL COLLEGE OF ENGINEERING	01.12.2005	30.06.2016	8 Year(s) & 4 Month(s)
Engineering	INFANT JESUS COLLEGE OF ENGINEERING	07.06.2004	08.06.2005	1 Year & 0 Month(s)
Engineering	SRI RAMANUJAR ENGINEERING COLLEGE	17.02.2003	03.06.2004	1 Year & 3 Month(s)

Degree	Specialization	Institute	University	Year of Passing
B.E	Electronics and Communication Engineering	PSNA COLLEGE OF ENGINEERING	Anna University, Chennai	2001
M.E	APPLIED ELECTRONICS	MOHAMED SATHAK ENGINEERING COLLEGE	Anna University, Tiruchirappalli	2011
Ph.D	Electronics and Communication Engineering / Information and Communication	ANNA UNIVERSITY CHENNAI	Anna University, Chennai	2020

Murugan, K; Nithya,R (et al.,) “Analysis of Full Adder cells in Numerous Logic Styles”, IEEE Xplore, DOI: 10.1109/ICEARS53579.2022.9751808, IEEE proceedings on International Conference Electronics and Renewable Systems (ICEARS).pp.90 – 96, (2022).

MURUGAN K , “Challenges and Advantages of Implementing Blockchain Internet of Medical Things (B-IoMT) in 6G Networks “, IGI GLOBAL PUBLISHER , Vol. , Issue , pp 248 , 2022

MURUGAN K , “Establishment of FANETs using IoT based UAV and its issues related to mobility and authentication”- Book: Modelling and Simulation of Fast – Moving Ad-Hoc Networks (FANETs and VANETs). IGI Global Publisher (June 2022)

Murugan,K; S. Mohammad Malik Mubeen, Dr. R. Uma Mageswari, Dr. R. Nithya. “Accuracy of Cervical Cancer Prediction Using Machine Learning Algorithms”. Design Engineering, pp. 1033 -42, http://www.the design engineering. com/ index. php/ DE/ article/view/1641, (2021).

Murugan,K;S. Mohammad Malik Mubeen, Dr.E.A. Mohamed Ali, S. Anula Beauty “Implementation of Wallace Tree Multiplier Using 8:4 Compressor”. Turkish Journal of Computer and Mathematics Education, Vol.12 No.11, pp.3582-3589. (2021)

S Pousia and K Murugan “VLSI Implementation of High Speed Low Power Design Using Hybrid Power Gating Technique”, IOP Conf. Series: Materials Science and Engineering, Vol.1084, DOI:10.1088/1757-899X/1084/1/012058, pp. 1-8,(2021).

Murugan K, Baulkani, S, “VLSI implementation of Ultra power Optimized Adiabatic Logic Based Full Adder Cell”, Microprocessor and Microsystems – Elsevier, ISSN: 0141-9331, DOI: http://doi. org/ 10.1016/j.micro.2019.07.001, vol.70, October 2019, pp. 15 – 20.

Murugan, K, Baulkani, S,“Power gated optimized carry select adder using power gated ALFA cell”, Journal of advanced research in dynamical and control systems, ISSN:1943-023X, DOI: 10.5373/JARDCS/V11SP10/20192878 vol.11, issue 10, pp. 821 – 827,(2019).

Murugan, K&Baulkani, S, “Design and Implementation of Energy Efficient Power Gated MALFA cell”, International Journal of Recent Technology and Engineering, ISSN: 2277-3878, DOI:10.35940/ijrte. D6926.118419, vol.8, issue 4, pp. 1178 – 1181, (2019).

JagubarSathik & Murugan, K, “Design and Analysis of a Digital Clock Using Carry Select Adder”, International Journal of Advanced Information Science and Technology”, Vol. 34, No.34, (2015)

S.No.	Title	Date	Reg. No.	Status	Level	Funding Agency
1	PET ASSISTANCE USING CLOUD COMPUTING	29.04.2022	202241020881	Published	National Level	Self
2	RFID BASED TRANSPORT MANAGEMENT	22.04.2022	202241019903	Published	National Level	Self
3	A LORA WAN INFRASTRUCTURE BASED SMART TRASH BIN LEVEL AND HAZARDOUS GAS MANAGEMENT SYSTEM	06.03.2022	202241030489	Published	National Level	Self

S No.	Topic	Program	Venue	Date
1	WEBINAR ON IOT USING ARDIUNO	IOT USING ARDIUNO	CSI COLLEGE OF ENGINEERING, NAZARATH TIRUCHENDUR	11.11.2022
2	GUEST LECTURE ON IOT SYSTEM DESIGN WITH ARDUINO	IOT SYSTEM DESIGN WITH ARDUINO	JP COLLEGE OF ENGINEERING, AYIKUDI, TENKASI	23.03.2022

S.No.	Awards
1	SESSON CHAIR, TECHNICAL SESSION FOR THE SECOND INTERNATIONAL CONFERENCE ON SMART TECHNOLOGIES, COMMUNICATION AND ROBOTICS 2022 (IEEE-STCT 2022) ORGANISED BY THE DEPARTMENT OF ECE,EIE & BME / BIT, DEC 2022.