Mr Nirmal Kumar R – Bannari Amman Institute of Technology

Experience Type	Organization	Date of Joining	To	Total Experience
Engineering	BIT-Sathy	17.08.2010

Degree	Specialization	Institute	University	Year of Passing
B.E.	Electrical and Electronics Engineering	A R J College of Engineering and Technology	Anna University, Chennai	2007
M.E.	VLSI Design	Bannari Amman Institute of Technology	Anna University of Technology, Coimbatore	2010

Nirmal Kumar R, Madhan Kumar M, Velan A K, Vishal Sriram R K Smart Navigation for Unfamiliar Indoor Location using Augmented Reality International Research Journal of Engineering and Technology (IRJET) Volume 8, Issue 4, April 2021 1020 – 1027 MAY 2021

NIRMAL KUMAR R 1. Low power Kogge stone adder applied in FIR USING CADENCE TOOL INTERNATIONAL JOURNAL OF SCIENTIFIC ISSUE 1 VOL 1 – FEB 2020

NIRMAL KUMAR R 2. Linearity of Feature Extraction Techniques for Medical Image by using Invariant Feature transforms International journal of Trend in Scientific Research and Development VOL 4 ISSUE 3 – MAY 2020

1. Nirmal Kumar R, Dr.R.S. Valarmathy, Karthick S Performance Analysis of Reconfigurable Heterogeneous Adder Architecture International Journal of Engineering and Advanced Technology (IJEAT) Volume-8 Issue-2s , 64 – 69 MAY 2019

Nirmal Kumar R , Chandran, V; Valarmathi, R. S; Kumar, D. Rajesh Bitstream Compression for High Speed Embedded Systems Using Separated Split Look Up Tables (LUTs) Journal of Computational and Theoretical Nanoscience, 15 5 1719 – 1727 MAY 2018

1. Nirmal Kumar R , Karthick, S., Kamalanathan, C., Valarmathi, R.S Energy efficient adder circuits for multiply and accumulation unit International Journal of Pure and Applied Mathematics 119 19 4467 – 4484 NOV 2018

R.Nirmalkumar, S.Karthick, R.S.Valarmathy, D.Rajesh Kumar Design and Analysis of MAC Journal of Computational and Theoretical nanoscience 15 xx 1 – 8 JUN 2018

C.Kamalanathan, R.S.Valarmathy, S.Karthick, R.Nirmalkumar TR-SS Algorithm for secure Resource Allocation in Cloud Computing International Journal of Pure and Applied Mathematics 119 16 4411 – 4422 MAY 2018

S.Karthick, R.Nirmalkumar, C.Kamalanathan, R.S.Valarmathy Energy Efficient Adder Circuit for multiply and accumulation unit International Journal of Pure and Applied Mathematics 119 16 4467 – 4484 MAY 2018

Nirmal Kumar R CSM and PSM based Reconfigurable VLSI Architecture International Journal of Research Trends in Engineering, Applied Science and Management (ICRTESM-2017) (IJEECS) 6 8 10 – 17 AUG 2017

C.Kamalanathan, S.Karthick,R.Nirmal Kumar CSM and PSM based Reconfigurable VLSI Architecture International Journal of Electrical, Electronics and and Computer System 6 8 – 2017

Nirmal KumarR Design of Optimized Reversible BCD Adder uses Reversible Logic Gates International Journal of Science, Engineering and Technology Research (IJSETR) 5 4 1214 – 1218 APR 2016

Nirmal Kumar R , Janani T Design and Performance of Baugh-Wooley Multiplier using Carry Look Ahead Adder International Journal of Advanced Research in Biology Engineering Science and Technology (IJARBEST) 2 Special Issue 10 1064 – 1070 MAR 2016

Nirmal Kumar R , Loguprasanth S, Prabhu M FPGA Implementation of Low Power and Efficient Multiplier Design using Fixed-Width RPR International Journal of Research 2 4 107 – 115 APR 2015

Nirmal Kumar R S.Karthick, Dr.R.Valarmathy A Survey on Reconfigurable Low Complexity Architectures for Fir Filters International Journal of Engineering Technology, Management and Applied Sciences 2 4 1054 – 1060 JUL 2014

Nirmal Kumar R Supervised Blood Vessel Segmentation in Retinal Images Using Gray level and Moment Invariant Features International Journal of Advanced Research in Electronics and Communication Engineering 3 11 1506 – 1510 NOV 2014

Nirmal Kumar R , Kiruthika S, Dr.S.Valarmathy ComparativeAnalysis of 4-Bit Multipliers Using Low Power 8-Transistor Full Adder Cells International Journal of Emerging Technology 3 1 37 – 42 JAN 2013

Nirmal Kumar R , Dhivya S.P, Dr.S.Valarmathy Design of Low Power, Highly Performing Dual Edge Triggered Sense Amplifier Flip Flops International Journal of Emerging Technology 3 1 55 – 61 JAN 2013

Nirmal Kumar R, Vijayashalini P, Dr.S.Valarmathy Design and Analysis of Low Power Multipliers and 4:2 Compressor Using Adiabatic Logic International Journal of Emerging Technology 3 1 75 – 81 JAN 2013

Nirmal Kumar R, Dr.S.Valarmathy, S.Karthick Design Of Efficient Vedic Multiplier by the analysis of Adders International Journal of Emerging Technology 3 1 105 – 111 JAN 2013

Nirmal Kumar R, “HANDWRITTEN TEXT RECOGNITION”, International Conference on Innovations in Electronics and Communications Systems (IECS2021), R.M.K College of Engineering and Technology, R.M.K College of Engineering and Technology, May 2021

Nirmal Kumar R, “HIGH PERFORMANCE AND LOW POWER SERF ADDER”, International Conference on Innovations in Electronics and Communications Systems (IECS2021), R.M.K College of Engineering and Technology, R.M.K College of Engineering and Technology, May 2021

NIRMAL KUMAR R, NITHYA B, RAJESH R, “High Performance and Low Power Sense Energy Recovery Full Adder”, National Conference on Mechatronics and Automation systems ( NCMAS 2021 ), BIT, BIT, April 2021

Nirmal Kumar R, NITHYA B , RAJESH R, “Reconfigurable Systematic Codeword Architecture Based Error Detection and Correction Algorithm Using Adder Circuit”, National Conference on Mechatronics and Automation systems, BIT, BIT, March 2021

Mr. R. Nirmal Kumar, Dr. R.S. Valarmathi Dr. M. Kalamani Ms. Nithya, “DESIGN AND ANALYSIS OF BRAUN MULTIPLIER USING LOW POWER ADDER “, First International Conference on Circuits, Signals, Systems, and Securities – ICCSSS 2020 during December 11-12, 2020. , The Department of Electronics and Communication Engineering, Electronics and Instrumentation Engineering, and Electrical and Electronics Engineering of Bannari Amman Institute of Technology, Sathyamangalam is organizing the First International Conference on Circuits, Signals, Systems, and Securities – ICCSSS 2020 , BIT, December 2020

Mr. R. Nirmal Kumar, Dr. R.S. Valarmathi Dr. M. Kalamani Ms. Nithya, “DESIGN AND ANALYSIS OF LOW POWER ADDERS FOR MULTIPLY AND ACCUMULATION UNITS”, First International Conference on Circuits, Signals, Systems, and Securities – ICCSSS 2020 during December 11-12, 2020. , The Department of Electronics and Communication Engineering, Electronics and Instrumentation Engineering, and Electrical and Electronics Engineering of Bannari Amman Institute of Technology, Sathyamangalam is organizing the First International Conference on Circuits, Signals, Systems, and Securities – ICCSSS 2020 , BIT, December 2020

Nirmal Kumar R, “Low Power Kogge Stone Adder Applied in Fir Filter Using Cadance Tool”, International Conference on Materials Manufacturing and Machining for Industry 4.0 (ICMMM 2.0), International Conference on Materials Manufacturing and Machining for Industry 4.0 (ICMMM 2.0) Organised by Department of Mechanical Engineering, BIT, October 2020

NIRMAL KUMAR R, “1BIOMETRIC SECURED ELECTRONIC VOTING MACHINE “, NATIONAL CONFERENCE ON SIGNAL PROCESSING, COMMUNICATION AND NETWORKING HELD DURING 13-14 MARCH 2020 BIT, BIT, SATHYAMANGALAM, March 2020

NIRMAL KUMAR R, “PERFORMANCE ANALYSIS OF COMP TRANSMISSION AND RECEPTION IN LTE SYSTEM”, NATIONAL CONFERENCE ON SIGNAL PROCESSING, COMMUNICATION AND NETWORKING, BIT, SATHYAMANGALAM, March 2020

NIRMAL KUMAR R, “Design and Analysis of low power high speed hybrid I Bit Full Adder using cadence tool “, National conference on Industrial Technologies NCIT 2020 , BIT, SATHYAMANGALAM, February 2020

R. Saravana Kumar, P. M. Rubesh Anand, S. Karthick, R. Nirmal Kumar, “Performance Analysis of Enhancement Mode Composite Channel MOSHEMT Device for Low Power Applications”, IEEE conference- ICACCE, , Bannari Amman Institute of Technology, April 2019

1. NIRMAL KUMAR R, R. SARAVANAKUMAR, P.M. RUBESH ANAND, S. KARTHICK, “Performance Analysis of Enhancement Mode Composite Channel MOSHEMT Device for Low Power Applications”, 5th IEEE International Conference on Advances in Computing and Communication Engineering(ICACCE-2019) , Bannari Amman Institute of Technology, Sathyamangalam, Bannari Amman Institute of Technology, Sathyamangalam, April 2019

Nirmal Kumar R , “Compact Models for Next Generation CMOS Transistor”, 5th IEEE International Conference on Advances in Computing and Communication Engineering(ICACCE-2019) , Bannari Amman Institute of Technology, Sathyamangalam, Bannari Amman Institute of Technology, Sathyamangalam, April 2019

Nirmal Kumar R , “Performance Optimization of CMOS transistor using Proteus software”, 5th IEEE International Conference on Advances in Computing and Communication Engineering(ICACCE-2019) , Bannari Amman Institute of Technology, Sathyamangalam, Sathy, April 2019

Nirmal Kumar R, “Offence Reporting Systems”, International Conference on Science ,Engneering and Management, , Jai Shiram Engineering college, March 2019

NIRMAL KUMAR R, “Area Efficient low Power Adder Ciecuits”, International conference on Cyber Physical Systems for Next Generation Computing, Department of IT and CSE, BIT, March 2018

NIRMAL KUMARR, “Hybrid Secure Resource Allocation using TR-SS Algorithm in Cloud Computing”, International conference on Cyber Physical Systems for Next Generation Computing, Department of IT and CSE, BIT, March 2018

NIRMAL KUMAR R, “Area Efficient low Power Adders Circuits”, International conference on Cyber Physical Systems for Next Generation Computing, Department of IT and CSE, BIT, March 2018

Nirmal Kumar R, “Design and Analysis of multiply and Accumulation units using low power adders”, International conference on Cyber Physical Systems for Next Generation Computing, Department of IT and CSE, BIT, March 2018

Nirmal Kumar R, “Design and Analysis of Multiply and Accumulation using low power Adders”, International conference on Cyber Physical Systems for Next Generation Computing, Department of IT and CSe, BIT, March 2018

Nirmal Kumar R, “Hybrid Secure Resource Allocation using TR-Ss Algorithm in Cloud Computing”, International conference on Cyber Physical Systems for Next Generation Computing, Department of IT and CSE, BIT, March 2018

, “Hybrid Secure Resource Allocation using TR-SS Algorithm in Cloud Computing”, International conference on Cyber Physical Systems For Next Generation Computing , BIT, Sathyamangalam, March 2018

, “Bit stream Compression for High Speed Embedded Systems using Separated Splitluts “, International conference on Cyber Physical Systems For Next Generation Computing , BIT, Sathyamangalam, March 2018

, “Design and Analysis of Multiply and Accumulation units using Low Power Adders “, International conference on Cyber Physical Systems For Next Generation Computing , BIT, Sathyamangalam, March 2018

, “Area Efficient Low Power Adders Circuits”, International conference on Cyber Physical Systems For Next Generation Computing , BIT, Sathyamangalam, March 2018

Nirmal Kumar R, “Design of Multiplier using 6T Low power Adder for multiply and Accumulation Unit”, National Conference on Innovation in Engineering and Technolog, Narasuâ??s Institute of Technology, Salem, Salem, August 2017

Nirmal Kumar R, “CSM and PSM based Reconfigurable VLSI Architecture”, International Journal of Research Trends in Engineering, Applied Science and Management (ICRTESM-2017), Institution pf Electronics and Telecommunication Engineers, Bangalore, August 2017

S.Karthick, Dr.C.Kamalanathan, and R.Nirmal Kumar, “CSM and PSM based Reconfigurable VLSI architecture”, 6th International Conference on Research Trends in Engineering Applied science and Managmant, Institute of Electronics and Telecommunication Engineers, Bangalore, August 2017

C.Kamalanathan, S.Karthick and R.Nirmal Kumar , “CSM and PSM based Reconfigurable VLSI Architecture”, 6 th International Conference on Research Trends in Engineering, Applied Science and Management, IETE, Bangalore, August 2017

Nirmal Kumar R, “Design of multiplier using 6T low power Adder for Multiply and Accumulation Unit “, Open data Sciences and Computing, Department of IT, BIT, March 2017

Nirmal Kumar R, “Designof Braun Multiplier using Low power adder”, NCCCN-2017, Department of ECE, BIT, February 2017

Nirmal Kumar R, “Design and Analysis of Low powerAders for Multiply and Accumulation units”, NCCCN-2017, Department of ECE, BIT, February 2017

Nirmal Kumar R, “Design of Optimized Reversible Adders using TOFFOLI GATE”, International conference on Engineering Innovations and Solutions (ICEJS-2016) , CMS College of Engineering, Namakkal, Nammakkal, April 2016

Nirmal Kumar R, “Design and Performance of Baugh-Woolley Multiplier using Carry Look Ahead Adder”, International conference on Innovations in Information, Embedded and Communication systems (ICIIECSâ??16) , Karpagam College of Engineering, Coimbatore, Coimbatore, March 2016

Nirmal Kumar R, “Supervised Blood Vessel Segmentation in Retinal Images using gray level and moment Invarient features”, International Conference on Trends in Technology and Engineering, Arjun College of Technology, Tamil nadu, April 2015

Nirmal Kumar R, “Analysis and Design of Low Power Adders for Multiply and Accumulation Units”, International conference cum pre conference workshop on innivations in Engineering and technology for Sustainable Development, BIt, BIT, September 2012

S.Karthick, R.Nirmal Kumar and Dr.S.Valarmathy, “Low Power Reconfigurable VLSI Architecture for FIR filter”, Innovation in Engineering and Technology for Sustainable Development, Bannari Amman Institute of Technology, Sathyamangalam, September 2012

Nirmal Kumar R, “Low Power High Speed Adders for Arithmetic Applications”, Advances in VLSI Design, Embedded Systems, Communication and Signal Processing , PSG College of Technology, Coimbatore, June 2012

Nirmal Kumar R, “Low power High speed Multiplier using different types of adders”, International Conference on Recent Trends in Computation method, communication and Control, Government college of Engineering Thrunelveli, Tirunelveli, April 2012

S.Karthick and R.Nirmal Kumar, “Low Power high speed multiplier using diffrent types of adders”, First International Conference on Recent Trends in Computational Methods, Communication and Controls, Goverment College of Engineering, Tirunelveli, April 2012

Nirmal Kumar R, “Efficient Adaptive cruise control system to avoid the skidding of vehicles on road curves”, National Conference on Signals, Systems and Security NCSSS-2012 , Bannari Amman Institute of Technology, BIT, February 2012

Nirmal Kumar R, “Analysis and Reduction of Leakage current in CMOS Circuits”, International. Conference on VLSI, communication, computation and security, Karunya University -Coimbatore, Karunya University , April 2010

Nirmal Kumar R, “Analysis and Reduction of Leakage current in CMOS Circuits”, International. Conference on Recent Advances in Mechanical Engineering, Noorul Islam University Kumaracoil , Noorul Islam University Kumaracoil , April 2010

S.Karthick and R.Nirmal Kumar, “Analysis and reduction of leakage current in CMOS circuits”, International Conference on recent advances in mechanical engineeering, Noorul Islam University, Kanyakumari, April 2010

Nirmal Kumar R, “Static power reduction in CMOS circuits using dual threshold method”, National Conference on NCSSS-10, Department of ECE, BIT, February 2010

Nirmal Kumar R, “Analysis and Reduction of Leakage current in CMOS Circuits”, National Conference on Advanced pattern mining and multimedia computing, NIT-Trichy , NIT-Trichy , February 2010

Nirmal Kumar R, “Static power reduction in CMOS circuits using PIN reordering”, National Conference on Emerging Trends in Communication and Information Technology, KSR college of Technology , Tiruchengode, February 2010

S.No.	Subject Area
1	Digital IC Design
2	Low Power VLSI Design
3	System Design with FPGA

S.No.	Achievements
1	Lead the Team of Students from ECE and won fourth place in the International Level Freescale Cup Championship held at Fraunhofer Institute of Integrated Circuits (Fraunhofer IIS) in Erlangen, Germany (2015)
2	Lead the Team of Students from ECE and won First place (Rs.2,00,000/- ) and in the National Level Freescale Cup Championship held at IISc Bangalore (2015)
3	Lead the Team of Students from ECE and won First (Rs.2,00,000/-) and Fourth (Rs.25,000) places and in the National Level Freescale Cup Championship held at IISc Bangalore (2013)
4	Appreciation Award for his service and support as Indian Faculty Advisor from Fraunhofer Institute of Integrated Circuits (Fraunhofer IIS) in Erlangen, Germany (2015)
5	Lead the Team of Students from ECE and won fifth place in the International Level Freescale Cup Championship held at Harbin University of Technology, Harbin-China (2013)