Dr Veerakumar S - Bannari Amman Institute of Technology

Smart India Hackathon 2025, 08th to 12th December 2025

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Experience Type	Organization	From	To	Total Experience
Engineering	Bannari Amman Institute of Technology, Sathyamangalam	14.05.2007
Engineering	Dhanalakshmi College of Engineering	28.04.2006	11.05.2007	1 Year & 0 Month

Degree	Specialization	Institute	University	Year of Passing
DEEE	EEE	Kongu Polytechic	State Board, Tamil Nadu	2000
B E	EEE	Kongu Engineering	Bharathiar University,Coimbatore	2004
M.Tech	Power Electronics	VIT	VIT University, Vellore	2006
Ph.D	Power Electronics	BIT SATHY	Anna University, Chennai	2015

S No.	Subject Area
1	Embedded Systems
2	Microcntrollers and Microprocessors
3	PCB Fabrication
4	Embedded C Programmng

Veerakumar S, J Arthur Vasanth, “Implementation of Sampled Reference Frame Algorithm In 8 Bit Microcontrollers”, International Journal of Electrical Engineering and Technology (IJEET), Volume 13, Issue 5, pages 67-84, Article ID: IJEET_13_05_009, Available online at https://iaeme.com/Home/issue/IJEET?Volume=13&Issue=5, ISSN Print: 0976-6545 and ISSN Online: 0976-6553, DOI: https://doi.org/10.17605/OSF.IO/EX2TC.2022.

S Veerakumar Certain Investigation on EV Controllers International Journal of Engineering and Science Research, pages 76 – 83, 2019.

S Veerakumar et al Certain Investigation in Performance of Three Phase Voltage Source Inverter Fed Induction Motor Drive by Various Pulse Width Modulation Techniques International Journal of Engineering Research, pages 976 – 988, 2014.

S Veerakumar et al Performance Analysis of Three Phase Voltage Source Inverter Fed Induction Motor Drive with Possible Switching Sequence Execution in SVPWM International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering,pages 10081 – 10104, 2014.

S Veerakumar et al Collective Performance Analysis of two level three Phase Voltage Source Inverter Fed Induction Motor Drive by Various Pulse Width Modulation Techniques Progress In Science and Engineering Research Journal, pages 12 – 25, 2014.

S Veerakumar et al Study and Analysis of three Phase Voltage Source Inverter Fed Induction Motor Drive in Various Pulse Width Modulation Techniques International Journal of Scientific Engineering and Technology, pages 1111 – 1114, 2014.

Veerakumar et al Performance Analysis of Two-Level Space Vector Pulse width Modulated three Phase Voltage Source Inverters In All Possible Switching Sequences International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering, pages 1959 – 1976, 2014.

S Manivannan Certain Investigations in Performance of three Phase Voltage Source Inverter Fed Induction Motor Drive by Various Pulse Width Modulation Techniques International Journal of Engineering Research and Technology (IJERT), pages 976 – 988, 2014.

S Manivannan Performance Analysis of three Phase Voltage Source Inverter Fed Induction Motor Drive with Possible Switching Sequence Execution in SVPWM International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering(IJAREEIE), pages 10081 – 10104, 2014.

S Manivannan Collective Performance Analysis of two level three Phase Voltage Source Inverter Fed Induction Motor Drive by Various Pulse Width Modulation Techniques Progress In Science and Engineering Research Journal (PISER), pages 12 – 25, 2014.

S Manivannan Study and Analysis of Three Phase Voltage Source Inverter Fed Induction Motor Drive in Various Pulse Width Modulation Techniques International Journal of Scientific Engineering and Technology(IJSET), pages 1111 – 1114, 2014.

S Manivannan Performance Analysis of Two-Level Space Vector Pulse width Modulated three Phase Voltage Source Inverters in All Possible Switching Sequences International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE), pages 1959 – 1976, 2014.

S.Veerakumar Total Harmonic Reduction for n-level cascaded H-Bridge Boost Inverter Using Hybrid Method, pages 706 – 715, 2013.

S Veerakumar, A Comparative Study of Multilevel Inverter, pages 103 – 112, 2013.

S Veerakumar, Nirmal Kumar, A Compact Cascaded H-Bridge Multilevel Inverter with Single DC Source for Pure Electric Vehicle International Review on Modeling and Simulation, pages 1401 – 1409, 2013.

S Veerakumar, Nirmal Kumar, A, Sathishkumar, S â?? Novel harmonic Elimination technique for cascaded h-bridge inverter using sampled reference frame Journal of Theoretical and Applied Information Technology, pages 421 – 429, 2013.

Veerakumar, Nirmal Kumar , S.Sathishkumar, Rajesh Novel Harmonic Elimination Technique for Cascaded H-Bridge Inverter using Sampled Reference Frame Journal of Theoretical and Applied Information Technology, pages 421 – 429, 2013.

S Veerakumar Advanced Embedded Computing Techniques for Industries through PLCC Technique , pages 164 – 169, 2010.

S Veerakumar ,A. Nirmal Kumar Wireless Networking for Sugar Industries through PLCC Technique in International Journal of Recent Trends in Engineering, pages1285 – 1290, 2009.

S Veerakumar, Wireless Networking for Sugar Industries though PLCC Technique, pages 151 – 154, 2009.

S No.	Title	Date	Reg. No.	Status	Level	Funding Agency
1	AI BASED DEVICE FOR SPLICING OPTICAL FIBERS	13.02.2025	395400001	Filed	National	Self
2	SOLAR PESTICIDE SPRAYER	02.08.2022	202241044332	Filed	National	Self
3	SMART DEHYDRATION BOTTLE	28.12.2021	202141061086	Filed	National	Self

S No.	Topic	Program	Venue	Date
1	Electric Vehicle	FDP	IIT Kurnool, Andhara Pradesh	31.12.2021
2	Introduction to PIC Microcontroller	IEEE SB	EEE Seminar Hall	05.10.2016
3	Electronic Circuit Simulation Using PROTEUS	One Day Workshop	SALZER BIT Innovation Centre	19.09.2016
4	Embedded Systems	PIC Microcontroller Based System Design	EEE Seminar Hall	23.08.2014

S.No.	Membership Number	Membership Body	Year	Duration
1	LM 60275	The Indian Society for Technical Education	2009	Life Time